The Future of Silicon Innovation in the Chiplet Era

We are entering a golden age of silicon innovation with disruptive innovation shaping how the foundations of computing will be designed, delivered, and deployed at scale. This is an area of the computing landscape that the TechArena has invested more than a fair share of time with expert discussions on CXL and UCIe, two industry standards that aim to change the face of data center infrastructure as we’ve known it for the past quarter century. This is why I was delighted to catch up with Letizia Giuliano, Alphawave Semi’s vice president of IP and product management, at the MemCon conference in Mountain View, California.

Alphawave Semi has emerged as a leader in high speed connectivity IP and silicon, and while they were focused on their HBM solutions at MemCon, their ambitions are much broader moving into IP blocks that can extend from data center SSD delivery to optics to future chiplet designs for UCIe powered compute. Letizia is a veteran of semiconductor design having worked on the complex and innovative Ponte Vecchio solution at Intel before joining Alphawave Semi, and our conversation was insightfully reflective of a new breed of semi innovator that is focusing on delivering core capabilities really well to fuel optimal package delivery.

Giuliano explained the company’s strategy is very much fueled by the AI era and the demand from customers to deliver more data to compute faster to speed time to insight from larger and larger data sets. HBM provides a perfect example of where Alphawave Semi’s expertise comes into play. “HBM is based on a 3D stack technology, so takes advantage of the new processes like TSB and 3D packaging and allows an SOC to have a wide part of the bus faster delivering higher bandwidth that differentiates it from other types of traditional DDR memory like DDR5 and DDR6.” This industry standard 3D stacked delivery of a wider memory bus provided by Alphawave Semi allows customers to take advantage of a lower latency and higher bandwidth memory source for data hungry application performance.

But that’s just the beginning. Alphawave Semi has set its sites squarely on the enormous opportunity that the UCIe standard has unleashed to the industry, for the first time creating a standard interconnect for chiplets on the same die. Giuliano’s excitement about what UCIe represents for her company was palpable in our discussion. “Someone said that the package is going to be the next motherboard and I really relate to that. Alphawave Semi can build a lot of pieces inside that package to make sure that we accelerate time to market for the solution.” This vision opens up incredible opportunity for disruptive platforms for customers like the large cloud service providers deeply involved in the UCIe standard, but it also changes the landscape of smaller semiconductor players with unique niches becoming increasingly relevant in delivery of IP to multi-vendor designs. This is what makes Alphawave Semi and others like them in the industry so interesting as we make this bold foray into the new chiplet era of compute delivery. To check out more about Alphawave Semi and get in touch with the team visit their website. As always, thanks for engaging - Allyson